1. Technical Field
The present disclosure relates to a process for manufacturing a membrane microelectromechanical device and to a membrane microelectromechanical device.
2. Description of the Related Art
As is known, semiconductor-machining techniques have made it possible to provide membrane microelectromechanical devices that may be used as sensors or transducers in various applications. For example, known to the art are capacitive pressure sensors, in which a semiconductor membrane separates a reference pressure chamber from the external environment. The difference between the external pressure and the reference pressure modifies the configuration of the membrane and hence the capacitive coupling between the membrane itself and the opposite wall of the chamber. In other cases, the deformation of the membrane is detected by exploiting the piezoresistive properties of monocrystalline silicon. Microelectromechanical membrane transducers are frequently used also as microphones.
The manufacture of membrane microelectromechanical devices is, however, rather problematical and, notwithstanding their wide diffusion, known processes suffer from certain limitations.
According to a known process, membrane microelectromechanical devices are obtained from semiconductor wafers comprising a substrate, an insulating layer, and a semiconductor structural layer, of a thickness substantially equal to the thickness of the membrane to be obtained. The structural layer may be monocrystalline, as in the case of silicon on insulator (SOI) wafers, or else polycrystalline. The back of the substrate is etched in an area corresponding to the membrane, as far as the insulating layer. The exposed portion of the insulating layer is then removed so as to free a portion of the structural layer, which forms the membrane.
Substrate etch is, however, critical, both from the standpoint of costs and because the large thickness of the substrate (several hundreds of microns) poses problems of alignment and of feasibility of the etch. In addition, the device obtained does not include any stopper structure capable of limiting the extension of the membrane towards the side of the substrate. The membrane is hence not protected and may undergo failure.
According to another known process, in a SOI wafer, which comprises a substrate, an insulating layer, and a monocrystalline structural layer, a sacrificial portion of the dielectric layer is selectively removed through apertures made in the structural layer, which forms a membrane. The apertures are closed by depositing dielectric material. The quality of the devices that can be obtained with the process described, however, is not optimal. In fact, the membranes thus obtained present discontinuities that can give rise to structural defects or cracks, both during machining and in use, as a result of the stresses. The relative brittleness of the membranes moreover requires rather large minimum thicknesses.
Other processes envisage opening a plurality of adjacent trenches directly in the substrate, possibly closing the trenches by an epitaxial growth, and then carrying out an annealing step with a temperature and duration such as to cause complete migration of the material, which forms diaphragms between the trenches. In this way, all the trenches join up in a single cavity closed by a membrane. Solutions of this type are, however, very difficult to control, especially with regards to a crucial parameter as the final thickness of the membrane, and in any case are rather complex.